One thing I haven't seen being talked about, are die sizes. This is one of the important areas to determine what performance to expect.
TSMC Will Reportedly Charge $20,000 Per 3nm Wafer
XB1 - 363 mm² (28nm) Durango
XB1S - 240 mm² (16nm) Durango 2
XB1X - 359 mm² (16nm) Scorpio
XBSS - 197 mm² (7nm) Lockhart
XBSX - 360 mm² (7nm) Scarlett
PS4 - 348 mm² (28nm) Liverpool
PS4 Slim - 209 mm² (16nm) Liverpool 16nm
PS4 Pro - 322 mm² (16nm) Neo
PS5 - 308 mm² (7nm) Oberon
PS5 6nm - ~278mm² (6nm) Oberon Plus
Notice the consoles from AMD stay under 400mm². Then we must understand smaller nodes are more expensive and if all the units if within a certain die area.
One way to combat die sizes and cost is to take the chiplet route.
Once, I proposed a 12-core Zen 4, 56 CU RDNA 3 chip. with a 319mm² (5nm²) die and 29mm² (6nm) MCDs, totaling 464mm² with 5 MCDs.
287mm² (4nm) GCD and 26mm² (5nm) MCDs, Total - 417mm² with 5 MCDs, 443mm² with 6 MCDs. Imagine the die size of a 72CU PS5 Pro.
This is based on
AMD Radeon RX 7800 XT and what performance to expect.
RT performance should be around the 3080.
Then Moores Law is Dead leaked what may very well be what to expect from the PS5 Pro based on the Strix Halo.
There is also the possibility of a multi-gpu chiplet approach based on this patent from Mark Cerny with 2 PS5 gpus working together but this is unlikely to happen. Higher possibility this is the approach for the PS6 with RDNA 4/5.
Generating hints of object overlap by region testing while rendering for efficient multi-GPU rendering of geometry
My point is, looking at die size and cost limitations, we should keep our expectations in check and not expect most games to be native 4k/60 with RT.
Remember, PS4 Pro wasn't exactly doing native 4k. Most of the time it was upscaling, so expect PS5 Pro to do the same in terms of resolution.